A 5-GHz CMOS transceiver for IEEE 802.11a wireless LAN systems

Author

Zargari, Masoud ; Su, David K. ; Yue, C. Patrick ; Rabii, Shahriar ; Weber, David ; Kaczynski, Brian J. ; Mehta, Srenik S. ; Singh, Kalwant ; Mendis, Sunetra ; Wooley, Bruce A.

Author_Institution

Atheros Communications, Sunnyvale, CA, USA

Volume

37

Issue

12

fYear

2002

fDate

12/1/2002 12:00:00 AM

Firstpage

1688

Lastpage

1694

Abstract

A 5-GHz transceiver comprising the RF and analog circuits of an IEEE 802.11a-compliant WLAN has been integrated in a 0.25-μm CMOS technology. The IC has 22-dBm maximum transmitted power, 8-dB overall receive-chain noise figure and -112-dBc/Hz synthesizer phase noise at 1-MHz frequency offset.

Keywords

CMOS integrated circuits; IEEE standards; OFDM modulation; field effect MMIC; frequency synthesizers; integrated circuit noise; microwave power amplifiers; mixed analogue-digital integrated circuits; phase noise; telecommunication standards; transceivers; wireless LAN; 0.25 micron; 5 GHz; 8 dB; CMOS transceiver; IEEE 802.11a wireless LAN systems; OFDM; RF circuits; analog circuits; frequency offset; frequency synthesizer; low-noise amplifier; maximum transmitted power; orthogonal frequency division multiplexing modulation; overall receive-chain noise figure; power amplifier; synthesizer phase noise; Analog circuits; CMOS analog integrated circuits; CMOS technology; Integrated circuit noise; Integrated circuit synthesis; Integrated circuit technology; Noise figure; Radio frequency; Transceivers; Wireless LAN;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2002.804353

Filename

1088096