Application of selective epitaxial silicon and chemo-mechanical polishing to bipolar transistors

Successful demonstration of single-polysilicon bipolar transistors fabricated using selective epitaxial growth (SEG) and chemo-mechanical polishing (CMP) is reported. The pedestal structure made possible by the SEG/CMP process combination results in significantly reduced extrinsic-base collector capacitance. Cut-off frequency (f_T) of devices with emitter stripe width of 1 μm, a base width of 110 nm, and a peak base doping of 3×10¹⁸ cm^-3 have been observed to improve from 16 GHz to 22 GHz when the extrinsic-base collector overlap is decreased from 1 μm to 0.2 μm. Leakage current, often a problem for SEG structures, has been reduced to 27 nA/cm² for the area component, and 10 nA/cm for the edge component, by (1) appropriate post-polish processing, including a high-temperature anneal and sacrificial oxidation, (2) aligning the device sidewalls along the ⟨100⟩ direction, and (3) the presence of the pedestal structure. Base-emitter junction nonideality in these transistors has also been investigated