DocumentCode
1208123
Title
Investigation of carrier generation in fully depleted enhancement and accumulation mode SOI MOSFET´s
Author
Sinha, Shankar P. ; Zaleski, Andrzej ; Ioannou, Dimitris E.
Author_Institution
Dept. of Electr. & Comput. Eng., George Mason Univ., Fairfax, VA, USA
Volume
41
Issue
12
fYear
1994
fDate
12/1/1994 12:00:00 AM
Firstpage
2413
Lastpage
2416
Abstract
An unified dual gate Zerbst-like technique has been developed to extract the generation lifetime in enhancement and accumulation mode fully depleted SOI MOSFET´s. The technique is based on the analysis of the temporal variation of the quasi Fermi levels in the devices, following the application of a suitable voltage step on one of the gates. The analysis resulted in simple Zerbst-like expressions for the drain current transients. Numerical simulations, using PISCES, have been performed to validate the technique and its underlying analysis. The technique has been applied to both kinds of typical fully depleted SIMOX SOI MOSFET´s and the measured generation lifetimes were in the range of 0.1 μs to 1.0 μs
Keywords
MOSFET; carrier lifetime; semiconductor device models; silicon-on-insulator; simulation; 0.1 to 1 mus; PISCES; SIMOX; SOI MOSFET; Si; accumulation mode; carrier generation; drain current transients; enhancement mode; fully depleted type; generation lifetime; numerical simulations; quasi Fermi levels; unified dual gate Zerbst-like technique; Capacitance measurement; Data mining; Helium; MOSFET circuits; Numerical simulation; Performance analysis; Semiconductor films; Silicon on insulator technology; Transient analysis; Voltage;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/16.337457
Filename
337457
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