DocumentCode
1208601
Title
Inhibited Error-Correction Decoder Performance
Author
Mitchell, Michael E.
Author_Institution
Military Communications Dept., General Electric Company, Oklahoma City, Okla., USA
Volume
10
Issue
4
fYear
1962
fDate
12/1/1962 12:00:00 AM
Firstpage
425
Lastpage
435
Abstract
An "inhibited" error-correction decoder is defined as one which inhibits its output of decoded information bits when an uncorrectable error is detected. The output bit error rate, probability of false acceptance, and other performance parameters of inhibited decoders are expressed as responses to uncorrectable errors and the effect of such errors on several error-correction decoders of practical interest is described in terms of the numerical results of a computer simulation.
Keywords
Circuit noise; Circuit optimization; Computer errors; Decoding; Error analysis; Error correction codes; Noise level; Nonlinear distortion; Telephony; Terminology;
fLanguage
English
Journal_Title
Communications Systems, IRE Transactions on
Publisher
ieee
ISSN
0096-2244
Type
jour
DOI
10.1109/TCOM.1962.1088687
Filename
1088687
Link To Document