Cascaded Diophantine Frequency Synthesis

Author

Sotiriadis, Paul Peter

Author_Institution

SOTEKCO LLC, Baltimore

Volume

55

Issue

3

fYear

2008

fDate

4/1/2008 12:00:00 AM

Firstpage

741

Lastpage

751

Abstract

Cascaded diophantine frequency synthesis (CDFS) is an approach to high-resolution frequency synthesis based on the mathematical properties of integer numbers and diophantine equations. CDFS can be implemented using two or more phase-locked loops (PLLs) and frequency mixing stages in a cascade topology. CDFS achieves frequency resolution arbitrarily finer than that of the constituent PLLs while maintaining their loop bandwidths and frequency hopping agility. CDFS results in intermediate signals with minimal frequency ranges in all frequency mixing stages, allowing for improved spectral purity and lower design complexity compared to the parallel form of its predecessor, diophantine frequency synthesis (DFS). CDFS architectures are modularly structured and expandable. The paper introduces CDFS focusing on the mathematical and algorithmic aspects.

Keywords

direct digital synthesis; phase locked loops; topology; cascade topology; cascaded diophantine frequency synthesis; diophantine equations; direct digital synthesis; frequency mixing; integer numbers; phase-locked loops; Bandwidth; Equations; Frequency locked loops; Frequency synthesizers; Instruments; Navigation; Phase locked loops; Signal resolution; Signal synthesis; Spread spectrum communication; Diophantine equation; Direct Digital Synthesis (DDS); frequency hopping; frequency synthesis; instrumentation; navigation systems; number theory; phase-locked loop (PLL); timing systems; wireless communications;

fLanguage

English

Journal_Title

Circuits and Systems I: Regular Papers, IEEE Transactions on

Publisher

ieee

ISSN

1549-8328

Type

jour

DOI

10.1109/TCSI.2008.919755

Filename

4509522