Title :
Hierarchical classification of permutation classes in multistage interconnection networks
Author :
Das, Nabanita ; Bhattacharya, Bhargab B. ; Dattagupta, Jayasree
Author_Institution :
Electron. Unit, Indian Stat. Inst., Calcutta, India
fDate :
12/1/1994 12:00:00 AM
Abstract :
This paper explores a new hierarchy among different permutation classes, that has many applications in multistage interconnection networks. The well-known LC (linear-complement) class is shown to be merely a subset of the closure set of the BP (bit-permute) class, known as the BPCL (bit-permute-closure) class; the closure is obtained by applying certain group-transformation rules on the BP-permutations. It indicates that for every permutation P of the LC class, there exists a permutation PI in the BP class, such that the conflict graphs of P and P* are isomorphic, for n-stage MIN´s. This obviates the practice of treating the LC class as a special case; the existing algorithm for optimal routing of BPC class in an n-stage MIN can take care of optimal routing of the LC class as well. Finally, the relationships of BPCL with other classes of permutations, e.g., LIE (linear-input-equivalence), BPIE (bit-permute-input-equivalence), BPOE (bit-permute-output-equivalence) are also exposed. Apart from lending better understanding and an integral view of the universe of permutations, these results are found to be useful in accelerating routability in n-stage MIN´s as well as in (2n-1)-stage Benes and shuffle-exchange networks
Keywords :
multistage interconnection networks; Benes networks; bit-permute class; bit-permute-closure; hierarchical classification; linear-complement class; multistage interconnection networks; permutation classes; shuffle-exchange networks; Acceleration; Communication switching; Computer networks; Intelligent networks; Large-scale systems; Multiprocessor interconnection networks; Network topology; Parallel processing; Routing; Switches;
Journal_Title :
Computers, IEEE Transactions on