DocumentCode :
1210009
Title :
Coding, decoding, and recovery of clock synchronization in digital multiplexing system
Author :
Wang, Hansheng ; Qin, Xiaoyi ; Zeng, Lieguang ; Xiong, Fuqin
Author_Institution :
Dept. of Electron. Eng., Tsinghua Univ., Beijing, China
Volume :
51
Issue :
5
fYear :
2003
fDate :
5/1/2003 12:00:00 AM
Firstpage :
825
Lastpage :
831
Abstract :
High-speed broadband digital communication networks rely on digital multiplexing technology where clock synchronization, including processing, transmission, and recovery of the clock, is the critical technique. This paper interprets the process of clock synchronization in multiplexing systems as quantizing and coding the information of clock synchronization, interprets clock justification as timing sigma-delta modulation (TΔ-ΣM), and interprets the jitter of justification as quantization error. As a result, decreasing the quantization error is equivalent to decreasing the jitter of justification. Using this theory, the paper studies the existing jitter-reducing techniques in transmitters and receivers, presents some techniques that can decrease the quantization error (justification jitter) in digital multiplexing systems, and presents a new method of clock recovery.
Keywords :
broadband networks; digital communication; multiplexing; quantisation (signal); synchronisation; timing jitter; broadband digital communication networks; clock justification; clock recovery; clock synchronization; digital multiplexing system; jitter; justification jitter; quantization error; quantizing; timing sigma-delta modulation; Clocks; Decoding; Digital communication; Frequency; Intelligent networks; Jitter; Laboratories; Quantization; Synchronization; Synchronous digital hierarchy;
fLanguage :
English
Journal_Title :
Communications, IEEE Transactions on
Publisher :
ieee
ISSN :
0090-6778
Type :
jour
DOI :
10.1109/TCOMM.2003.811432
Filename :
1201518
Link To Document :
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