DocumentCode
1210525
Title
Anomalous narrow channel effect in trench-isolated buried-channel p-MOSFET´s
Author
Mandelman, J.A. ; Alsmeier, J.
Author_Institution
IBM Microelectron. Div., IBM Semicond. Res. & Dev. Centre, Hopewell Junction, NY, USA
Volume
15
Issue
12
fYear
1994
Firstpage
496
Lastpage
498
Abstract
An anomalous threshold voltage dependence on channel width measured on 0.25 μm groundrule trench-isolated buried-channel p-MOSFET\´s is reported here. As the channel width is reduced, the magnitude of the threshold voltage first decreases before the onset of the expected sharp rise in Vt for widths narrower than 0.4 μm. Modeling shows that a "boron puddle" is created near the trench bounded edge as a result of transient enhanced diffusion (TED) during the gate oxidation step. TED is governed by interstitials produced by a deep phosphorus implant, used for latchup suppression, diffusing towards the trench sidewall and top surface of the device. The presence of the "boron puddle" imposes a penalty on the off-current of narrow devices. A solution for minimizing the "boron puddle" is demonstrated with simulations, confirmed by measurements.
Keywords
MOSFET; buried layers; diffusion; interstitials; isolation technology; 0.25 to 0.4 micron; Si:B,P; boron puddle; deep phosphorus implant; gate oxidation; groundrule trench-isolated buried-channel p-MOSFETs; interstitials; latchup suppression; narrow channel; off-current; simulations; threshold voltage; transient enhanced diffusion; Boron; CMOS process; Doping; Implants; Low voltage; MOSFET circuits; Oxidation; Silicon; Threshold voltage; Ultra large scale integration;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/55.338415
Filename
338415
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