Title :
Mixed-mode simulation approach to characterize the circuit delay sensitivity to implant dose variations
Author :
Srinivasaiah, H.C. ; Bhat, Navakanta
Author_Institution :
Dept. of Electr. Commun. Eng., Indian Inst. of Sci., Bangalore, India
fDate :
6/1/2003 12:00:00 AM
Abstract :
Process, device, and mixed-mode (device/circuit) simulation-based approach is presented for 0.1-μm gate length CMOS technology optimization and sensitivity analysis. The disposable spacer-based 0.1-μm NMOS and PMOS transistors with excellent short channel characteristics are designed using process and device simulations. The implant-dose sensitivity of the device parameters around the nominal value are estimated. The halo implant and super steep retrograde channel implant dose fluctuations are found to have a profound effect on device characteristics. It is shown that the mixed-mode device/circuit simulation can be used as an excellent tool to connect the circuit delay sensitivity to underlying process parameters. The simulation results demonstrate that the relation between circuit and process parameters is highly nonlinear for the deep submicron technology.
Keywords :
CMOS integrated circuits; MOSFET; ion implantation; semiconductor device models; semiconductor process modelling; 0.1 micron; CMOS deep submicron technology optimization; NMOS transistor; PMOS transistor; circuit delay; device simulation; disposable spacer; dose fluctuations; halo implant; mixed-mode device/circuit simulation; process simulation; sensitivity analysis; short channel characteristics; super steep retrograde channel implant; transistor mismatch; Analytical models; CMOS process; CMOS technology; Circuit simulation; Delay; Implants; MOS devices; MOSFETs; Sensitivity analysis; Space technology;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
DOI :
10.1109/TCAD.2003.811453
