• DocumentCode
    1210830
  • Title

    Minimum current/area implementation of cyclic ADC

  • Author

    Zhang, Haijun ; Li, Qifeng ; Sanchez-Sinencio, Edgar

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Texas A&M Univ., College Station, TX
  • Volume
    45
  • Issue
    7
  • fYear
    2009
  • Firstpage
    351
  • Lastpage
    352
  • Abstract
    A global offset cancellation technique is proposed to solve the offset/flicker noise problem. It helps to minimise the silicon area and power consumption of a cyclic analogue-to-digital converter (ADC) with an operational transconductance amplifier sharing scheme. A 10 bit 1 MS/s cyclic ADC implemented in the TI 0.35 m CMOS process proves the effectiveness of the proposed technique.
  • Keywords
    CMOS analogue integrated circuits; analogue-digital conversion; flicker noise; operational amplifiers; CMOS process; cyclic ADC; cyclic analogue-to-digital converter; global offset cancellation technique; offset-flicker noise problem; operational transconductance amplifier; size 0.35 mum;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el.2009.0293
  • Filename
    4807012
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1210830