Scalable Approach for HBT´s Base Resistance Calculation

This paper presents a detailed investigation of the dual base method for intrinsic and extrinsic HBT´s base resistance extraction that is of utmost importance for process monitoring and device modeling purpose. Ring emitter test structures layout, dc measurement conditions, and extraction methodology have been improved to get reliable results. A particular attention has been drawn to the external base resistance extraction and the effect of parasitic resistances is highlighted. The method has been generalized for an extraction of the base resistance specific parameters using any number of geometries (widths and lengths) and therefore demonstrates the base resistance scalability. This method is applied to a ST state-of-art fully self aligned double poly BiCMOS SiGeC technology, and results are discussed.