Title :
The performance analysis and implementation of an input access scheme in a high-speed packet switch
Author :
Mehmet-Ali, Mustafa K. ; Youssefi, Mojtaba ; Nguyen, Huu Tri
Author_Institution :
Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que., Canada
fDate :
12/1/1994 12:00:00 AM
Abstract :
The performance analysis of an input access scheme in a high-speed packet switch for broadband ISDN is presented. In this switch, each input port maintains a separate queue for each of the outputs, thus n 2 input queues in an (n×n) switch. Using synchronous operation, at most one packet per input and output will be transferred in any slot. We derive lower and upper bounds for the throughput which show close to optimal performance. The bounds are very tight and approach to unity for switch sizes on the order of a hundred under any traffic load, which is a significant result by itself. Then the mean packet delay is derived and its variance is bounded. A neural network implementation of this input access scheme is given. The energy function of the network, its optimized parameters and the connection matrix are determined. Simulation results of the neural network fall between the theoretical throughput bounds
Keywords :
B-ISDN; Hopfield neural nets; asynchronous transfer mode; delays; electronic switching systems; packet switching; performance evaluation; queueing theory; telecommunication traffic; Hopfield neural networks; broadband ISDN; connection matrix; energy function; high-speed packet switch; input access scheme; input port; input queues; lower bounds; mean packet delay; neural network; performance analysis; simulation results; switch sizes; synchronous operation; throughput; traffic load; upper bounds; variance; Asynchronous transfer mode; B-ISDN; Delay; Fabrics; Neural networks; Optical packet switching; Packet switching; Performance analysis; Switches; Throughput;
Journal_Title :
Communications, IEEE Transactions on
