• DocumentCode
    1213219
  • Title

    Application of Pt/a-Si:H gate GaAs FETs to wide noise margin direct-coupled FET logic

  • Author

    Galashan, A.F. ; Bland, S.W.

  • Author_Institution
    STC Technol. Ltd., Harlow, UK
  • Volume
    25
  • Issue
    20
  • fYear
    1989
  • Firstpage
    1344
  • Lastpage
    1345
  • Abstract
    The use of a Pt/a-Si:H gate on GaAs MESFET structures is shown to produce a rectifying gate with lower currents in forward bias, this being applicable to increasing noise margins in direct coupled FET logic schemes. FETs show good DC transconductance, low hysteresis in the current voltage (I/V) characteristics, and the absence of severe drift. This confirms that the approach is not hampered by slow surface states.
  • Keywords
    III-V semiconductors; Schottky gate field effect transistors; field effect integrated circuits; gallium arsenide; hydrogen; integrated logic circuits; platinum; silicon; DC transconductance; GaAs; I-V characteristics; MESFET structures; Pt-Si:H gate; direct-coupled FET logic; forward bias; low hysteresis; rectifying gate; wide noise margin;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19890898
  • Filename
    33985
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1213219