• DocumentCode
    1213535
  • Title

    Analysis of static and dynamic characteristics in v.i.l.

  • Author

    Kato, Shu-ichi ; Tomisawa, Osamu ; Horiba, Yasutaka ; Nakano, Takao

  • Author_Institution
    Mitsubishi Electric Corporation, LSI Department Laboratory, Itami, Japan
  • Volume
    2
  • Issue
    3
  • fYear
    1978
  • fDate
    5/1/1978 12:00:00 AM
  • Firstpage
    83
  • Lastpage
    90
  • Abstract
    After a survey of the electrical characteristics for vertical injection logic (v.i.l.) structure compared with the conventional i.i.l. structure, static characteristics and dynamic behaviour for the v.i.l. structure are analysed by using a simplified one-dimensional model, and experimental verifications are carried out. The analysis reveals that the minimum propagation delay time is determined by the cutoff frequency of the n-p-n transistor and the effective lifetime of holes injected into the epitaxial layer from the base. The bottom injector in the v.i.l. structure reduces the effective lifetime of the holes, which results in improved minimum propagation delay times. In addition, the improvement in the minimum propagation delay times due to a reduction in the effective lifetime is more pronounced when the cutoff frequency is higher. Experimental results show that the minimum propagation delay time for v.i.l. is improved by a factor of 1.6, as predicted from the analysis.
  • Keywords
    bipolar integrated circuits; integrated logic circuits; semiconductor device models; VIL; dynamic characteristics; effective lifetime of holes; minimum propagation delay time; n-p-n transistor; one dimensional model; static characteristics; vertical injection logic;
  • fLanguage
    English
  • Journal_Title
    Solid-State and Electron Devices, IEE Journal on
  • Publisher
    iet
  • ISSN
    0308-6968
  • Type

    jour

  • DOI
    10.1049/ij-ssed.1978.0036
  • Filename
    4807585