Two-dimensional analysis of breakdown in epitaxial planar junctions

Author

Jindal, S. ; Bhattacharyya, A.B. ; Warrior, J.

Author_Institution

Indian Institute of Technology, Electronics, Electrical Engineering Department, New Delhi, India

Volume

2

Issue

4

fYear

1978

fDate

7/1/1978 12:00:00 AM

Firstpage

109

Lastpage

114

Abstract

A two-dimensional analysis of planar p-n-n+ junctions has been carried out using a successive-point overrelaxation method. This analysis gives better insight into the location of breakdown and the dependence of breakdown voltage on physical parameters of the junction, than obtained by a one-dimensional analysis. During the study an empirical relation has been found between breakdown voltage and the corresponding depletion-layer width. The computer program developed in this work enables calculation of generation current also. The information obtained helps in better device design.

Keywords

electronic engineering computing; p-n homojunctions; semiconductor device models; semiconductor epitaxial layers; breakdown location; breakdown voltage; computer aided analysis; depletion layer width effect; epitaxial planar junctions; generation current; physical parameters effect; planar p-n-n+ junctions; point overrelaxation method; punch through condition; successive electric breakdown; two dimensional analysis;

fLanguage

English

Journal_Title

Solid-State and Electron Devices, IEE Journal on

Publisher

iet

ISSN

0308-6968

Type

jour

DOI

10.1049/ij-ssed.1978.0042

Filename

4807592