A class of error-locating codes for byte-organized memory systems

Author

Fujiwara, Eiji ; Kitakami, Masato

Author_Institution

Dept. of Comput. Sci., Tokyo Inst. of Technol., Japan

Volume

40

Issue

6

fYear

1994

fDate

11/1/1994 12:00:00 AM

Firstpage

1857

Lastpage

1865

Abstract

Error-locating codes (EL codes), first proposed by J.K. Wolf and B. Elspas in 1963, have the potential to be used to identify the faulty module for fault isolation and reconfiguration in fault-tolerant computer systems. This paper proposes a new class of EL codes suitable for memory systems organized with b-bit (b⩾2) byte-organized semiconductor memory chips that are mounted on memory cards each having B-bit width. The proposed linear code, called the S_bB/EL code, identifies erroneous memory card locations containing a faulty byte-organized chip. Another linear code proposed in this paper, the SEC-S_bB/EL code, corrects single-bit errors induced by alpha particles and, for byte errors, it locates erroneous card positions containing a faulty chip. This paper describes design methods of the proposed codes and shows an evaluation of the decoding hardware and the error detection capabilities

Keywords

decoding; error correction codes; error detection codes; fault tolerant computing; integrated memory circuits; linear codes; byte-organized memory systems; byte-organized semiconductor memory chips; decoding hardware; design methods; error detection; error-locating codes; fault isolation; fault reconfiguration; fault-tolerant computer systems; faulty module; linear code; memory cards; single-bit error correction; Alpha particles; Computer errors; Decoding; Design methodology; Error correction codes; Fault diagnosis; Fault tolerant systems; Hardware; Linear code; Semiconductor memory;

fLanguage

English

Journal_Title

Information Theory, IEEE Transactions on

Publisher

ieee

ISSN

0018-9448

Type

jour

DOI

10.1109/18.340460

Filename

340460