DocumentCode
1215382
Title
Incremental fault diagnosis
Author
Liu, Jiang Brandon ; Veneris, Andreas
Author_Institution
High-Performance Tools & Methodology Group, Austin, TX, USA
Volume
24
Issue
2
fYear
2005
Firstpage
240
Lastpage
251
Abstract
Fault diagnosis is important in improving the circuit-design process and the manufacturing yield. Diagnosis of today´s complex defects is a challenging problem due to the explosion of the underlying solution space with the increasing number of fault locations and fault models. To tackle this complexity, an incremental diagnosis method is proposed. This method captures faulty lines one at a time using the novel linear-time single-fault diagnosis algorithms. To capture complex fault effects, a model-free incremental diagnosis algorithm is outlined, which alleviates the need for an explicit fault model. To demonstrate the applicability of the proposed method, experiments on multiple stuck-at faults, open-interconnects and bridging faults are performed. Extensive results on combinational and full-scan sequential benchmark circuits confirm its resolution and performance.
Keywords
VLSI; circuit simulation; combinational circuits; fault simulation; logic testing; sequential circuits; bridging faults; circuit simulation; combinational circuits; complex fault effects; full-scan sequential benchmark circuits; incremental fault diagnosis; linear-time single-fault diagnosis algorithm; model-free incremental diagnosis algorithm; multiple stuck-at faults; open-interconnects; very large scale integration; Circuit faults; Circuit simulation; Circuit testing; Explosions; Failure analysis; Fault diagnosis; Fault location; Logic testing; Manufacturing processes; Very large scale integration;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.2004.841070
Filename
1386379
Link To Document