Single event mirroring and DRAM sense amplifier designs for improved single-event-upset performance

This paper proposes and investigates schemes for hardening the conventional CMOS cross-coupled DRAM sense amplifier to single event upset (SEU). These schemes, adapted from existing SRAM hardening techniques, are intended to harden the dynamic random access memory to bitline-mode errors during the sensing period. Simulation results indicate that a 9 k/spl Omega/ L-resistor hardening scheme provides greater than 24-fold improvement in critical charge over a significant part of the sensing period. Also proposed is a novel single event (SE) mirroring concept for SEU hardening of DRAMs. This concept has been implemented for hardening the bitlines to hits on diffusion regions connected to the lines during the highly susceptible high-impedance state of the bitlines. It is shown to result in over 26-fold improvement in the level of critical charge using a 2pF dynamic capacitive coupling.<>