DocumentCode :
1216369
Title :
Total dose hardness of field programmable gate arrays
Author :
Lum, G.K. ; May, R.J. ; Robinette, L.E.
Author_Institution :
Lockheed Missiles & Space Co. Inc., Sunnyvale, CA, USA
Volume :
41
Issue :
6
fYear :
1994
Firstpage :
2487
Lastpage :
2493
Abstract :
In this paper we present the effect of total dose ionization of nonhardened field programmable gate arrays considered for space applications. By irradiating test structures and modeling the circuits that include total dose degradation, the basic leakage mechanism in the design at elevated temperature can be understood Results show that a large array of CMOS inverter structures will conduct large currents when the threshold voltages of the p and n-channel transistors reach the transition point of switching. Results show that if the n- and p-channel thresholds were to be increased in the process, this problem can be mitigated and hardness above 100 krad(Si) can be achieved.<>
Keywords :
CMOS logic circuits; field programmable gate arrays; integrated circuit modelling; leakage currents; radiation effects; radiation hardening (electronics); 100 krad; CMOS inverter structures; field programmable gate arrays; leakage mechanism; modeling; n-channel transistors; nonhardened FPGA; p-channel transistors; space applications; test structures; threshold voltages; total dose hardness; total dose ionization; Circuit testing; Field programmable gate arrays; Ionization; Logic devices; Logic programming; Missiles; Programmable logic arrays; Ring oscillators; System testing; Temperature;
fLanguage :
English
Journal_Title :
Nuclear Science, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9499
Type :
jour
DOI :
10.1109/23.340606
Filename :
340606
Link To Document :
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