DocumentCode :
1216642
Title :
Efficient approach to synthesis of multioutput Boolean functions on PAL-based devices
Author :
Kania, D.
Volume :
150
Issue :
3
fYear :
2003
fDate :
5/19/2003 12:00:00 AM
Firstpage :
143
Lastpage :
149
Abstract :
An efficient approach to logic synthesis of multioutput functions using PAL-based devices is proposed. According to this approach, product terms included in a logic block can be shared by several functions. The method consists of a search for the common multioutput implicants. After completion of two-level minimisation of the multioutput function, the process of searching for the common implicants is carried out. An algorithm has been implemented within the PAL decomposition system. The results are compared with classical technology mapping and a synthesis of benchmarks executed by means of firmware.
Keywords :
Boolean functions; minimisation; programmable logic arrays; PAL decomposition system; PAL-based devices; benchmark synthesis; common implicant search; logic synthesis; multioutput Boolean function synthesis; two-level minimisation;
fLanguage :
English
Journal_Title :
Computers and Digital Techniques, IEE Proceedings -
Publisher :
iet
ISSN :
1350-2387
Type :
jour
DOI :
10.1049/ip-cdt:20030223
Filename :
1203184
Link To Document :
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