Fan-in- and fan-out-factor oriented BIST design for sequential machines

BIST design for sequential circuits is a difficult enterprise. The difficulty stems from the lack of uniformity in reachability and emitability of machine states. The paper introduces a BIST-quality metric termed the FiF-FoF (fan-in-factor and fan-out-factor) defined on finite state machine (FSM) states. Based on the FiF-FoF analysis, an efficient synthesis scheme is presented that ensures all state codes of FSM may appear with uniform likelihood at the present state lines during the test phase. The uniform mobility of states ensures higher fault efficiency in a BIST structure of the circuit. Extensive experimentation on benchmarks and randomly generated large FSMs shows that the proposed scheme improves the fault efficiency of sequential circuits significantly, with marginal area overhead.