Title :
New DRAM noise generation under half-Vcc precharge and its reduction using a transposed amplifier
Author :
Aoki, Masakazu ; Ikenaga, Shin´Ichi ; Nakagome, Yoshinobu ; Horiguchi, Masashi ; Kawase, Yasushi ; Kawamoto, Yoshifumi ; Itoh, Kiyoo
Author_Institution :
Hitachi Ltd., Tokyo, Japan
fDate :
8/1/1989 12:00:00 AM
Abstract :
Dynamic RAM (DRAM) data-line interface noise generated during amplification, the key problem in designing 16 Mbit and higher DRAMs, is investigated. It is reported that: (1) in the half-Vcc approach, specific combinations of signal types (high and low) and CMOS sense-amplifier operating sequences cause interference noise during amplification; (2) interference noise exists in sense amplifiers; and (3) the noise results in a detrimental effect on data holding time characteristics. The interference noise is overcome by a transposed amplifier structure combined with a transposed data-line structure
Keywords :
electron device noise; integrated memory circuits; interference (signal); random-access storage; DRAM noise generation; data holding time characteristics; data-line interface noise; sense-amplifier operating sequences; signal types; transposed amplifier; Circuit noise; Circuit testing; Interference; Low-noise amplifiers; Noise generators; Noise reduction; Parasitic capacitance; Random access memory; Signal design; Voltage;
Journal_Title :
Solid-State Circuits, IEEE Journal of
