DocumentCode
1216940
Title
iAPX 432 hardware fault-handling mechanisms
Author
Ciminiera, L. ; Valenzano, A.
Author_Institution
Politecnico di Torino, Dipartimcnto di Automatica c Informatica, Torino, Italy
Volume
3
Issue
3
fYear
1984
fDate
6/1/1984 12:00:00 AM
Firstpage
67
Lastpage
74
Abstract
The architecture of the Intel iAPX 432 system has two major innovative characteristics: hardware support for object-oriented programming, and fault-handling mechanisms implemented on the chip. A previous paper has dealt with the former characteristic; the present paper describes the latter class of features, which allow massive redundancy to be implemented with a small number of chips. Another prominent characteristic of the iAPX 432 is the ability to automatically reconfigure itself using only hardware components; in this way the system-down periods can be much reduced and the traffic of messages reporting the occurrence of faults not recoverable by the hardware is considerably lessened.
Keywords
computer architecture; fault tolerant computing; large scale integration; microprocessor chips; Intel iAPX 432 system; fault-handling mechanisms; hardware support; messages; redundancy; system-down periods;
fLanguage
English
Journal_Title
Software & Microsystems
Publisher
iet
ISSN
0261-3182
Type
jour
DOI
10.1049/sm.1984.0021
Filename
4808011
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