Title :
Reducing computations in SPICE with node-reduced multiterminal representations of semiconductor devices
Author :
Chou, Jack C K ; Balsara, Poras T. ; Gu, Qin
Author_Institution :
Sch. of Eng. & Comput. Sci., Texas Univ., Dallas, TX, USA
fDate :
12/1/1994 12:00:00 AM
Abstract :
Multiterminal representation (MTR) of a subsystem constitutes the central concept in the analysis of a large-scale physical system through its subsystems. A new nodal reduction technique is developed to further reduce the number of nodes in a nodal-admittance MTR. The results of the implementation of MTR´s in the circuit simulator SPICE show that the nodal-reduced MTR achieves an improvement in processing time while maintaining the same simulation accuracy
Keywords :
SPICE; VLSI; circuit analysis computing; digital simulation; integrated circuit design; multiterminal networks; semiconductor device models; SPICE; circuit simulator; large-scale physical system; nodal-admittance MTR; node-reduced multiterminal representations; semiconductor devices; simulation accuracy; Circuit analysis computing; Circuit simulation; Computational efficiency; Computational modeling; Design optimization; Large-scale systems; Lifting equipment; SPICE; Semiconductor devices; Very large scale integration;
Journal_Title :
Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on
