Analysis and reduction of sense-amplifier offset

The offset of sense amplifiers used for dynamic RAMs (DRAMs) at the megabit level is investigated. An analytic expression which permits an easy calculation of the different offset contributions is derived. The influence of the transistor size and the effect of decoupling devices between bit lines and amplifier are discussed. The sensitivity can be improved if a preamplifier is used. Here, a circuit that doubles the sense signals by switching two capacitors between bit line and reference line is presented. The performance of the preamplifier has been verified through its realization on a test chip