• DocumentCode
    1217849
  • Title

    A Josephson 4 bit RALU for a prototype computer

  • Author

    Nakagawa, Hiroshi ; Kosaka, Shin ; Kawamura, Hiroki ; Kurosawa, Itaru ; Aoyagi, Masahiro ; Hamazaki, Youichi ; Okada, Yoshikuni ; Takada, Susumu

  • Author_Institution
    Electrotech. Lab., Ibaraki, Japan
  • Volume
    24
  • Issue
    4
  • fYear
    1989
  • fDate
    8/1/1989 12:00:00 AM
  • Firstpage
    1076
  • Lastpage
    1084
  • Abstract
    A Josephson 4 bit register/arithmetic logic unit (RALU) which is adaptable to a prototype computer is discussed. The RALU circuit is designed to be composed of ALU, accumulator, registers for 10 bit instructions, 8 bit address, 4 bit data and carry flag, multiplexers, and so on. It consists of a four-junction logic (4JL) gate family of OR, AND, INVERT, and AMP gates. A complete set of photomasks of the RALU has been generated with the computer-aided-design system which performs an automatic standard cell layout, wiring, and logic check. The RALU chip has been fabricated using a 3 μm Nb/AlOx/Nb tunnel junction technology. Sixteen power voltage regulator junctions and 1273 logic gates are integrated on the 4.3×5 mm2 chip. Operations have been confirmed for all 24 kinds of instructions in the RALU chip. Total power dissipation is 1.66 mW. A delay time of 300 ps has been evaluated for generating the SKIP signal to control the program address in the sequence control unit, which is essential to achieve one instruction execution for every high-speed clock cycle
  • Keywords
    aluminium compounds; cellular arrays; logic CAD; logic gates; niobium; superconducting logic circuits; 1.66 mW; 3 micron; 300 ps; AMP gates; AND gates; Nb-AlOxNb; OR gates; RALU; SKIP signal; accumulator; carry flag; computer-aided-design system; four-junction logic; high-speed clock cycle; instruction execution; inverters; multiplexers; photomasks; power dissipation; power voltage regulator junctions; prototype computer; register/arithmetic logic unit; registers; sequence control unit; standard cell layout; Circuits; Digital arithmetic; Josephson junctions; Logic gates; Multiplexing; Niobium; Prototypes; Pulse inverters; Registers; Wiring;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/4.34095
  • Filename
    34095