Title :
A microprogrammable real-time video signal processor (VSP) for motion compensation
Author :
Yamashina, Masakazu ; Enomoto, Tadayoshi ; Kunio, Takemitsu ; Tamitani, Ichiro ; Harasaki, Hidenobu ; Endo, Yukio ; Nishitani, Takao ; Sato, Masao ; Kikuchi, Koichi
Author_Institution :
NEC Corp., Kanagawa, Japan
Abstract :
A video signal processor (VSP) LSI circuit with a three pipelined architecture has been developed for pattern matching, which is fundamental for the motion compensation necessary for teleconferencing systems. A high-speed arithmetic logic unit with absolute-value calculation capability and a minimum/maximum value detector, which are essential to pattern matching, have been integrated on the VSP LSI. The chip was fabricated with a 2.5- mu m CMOS and double-layer metallization technology. The number of MOSFETs integrated on the 9.91*9.50-mm/sup 2/ chip is about 48000. It operates at a 14.3-MHz clock frequency with a single 5-V power supply and typically consumes 240 mW. An experimental video signal processing system, using a single VSP LSI chip, is discussed.<>
Keywords :
CMOS integrated circuits; compensation; computerised pattern recognition; computerised picture processing; large scale integration; microprocessor chips; microprogramming; pipeline processing; real-time systems; telecommunications computing; teleconferencing; video signals; 14.3 MHz; 2.5 micron; 240 mW; 5 V; CMOS; LSI circuit; MOSFETs; VSP; absolute-value calculation capability; double-layer metallization technology; high-speed arithmetic logic unit; minimum/maximum value detector; motion compensation; pattern matching; real-time video signal processor; teleconferencing systems; three pipelined architecture; Arithmetic; CMOS logic circuits; CMOS technology; Detectors; Large scale integration; Metallization; Motion compensation; Pattern matching; Signal processing; Teleconferencing;
Journal_Title :
Solid-State Circuits, IEEE Journal of
