A reconfigurable op-amp/DDA CMOS amplifier architecture

Author

Zarabadi, Seyed R. ; Larsen, Frode ; Ismail, Mohammed

Author_Institution

Dept. of Electr. Eng., Ohio State Univ., Columbus, OH, USA

Volume

39

Issue

6

fYear

1992

fDate

6/1/1992 12:00:00 AM

Firstpage

484

Lastpage

487

Abstract

A simple architecture for a configurable op-amp or differential difference amplifier (DDA) is presented. The circuitry can be configured as an input/output rail to rail high-speed op-amp, or as a DDA. The circuit was simulated using SPICE and fabricated in a 2-μm CMOS process through MOSIS. Configured as an op-amp, it achieves a positive and negative slew rate of 16 V/μs, a unity gain frequency of 14 MHz, and an open loop differential gain of 68 dB with a power consumption of 6 mW at 5-V supply. The circuit was also tested and found to work satisfactorily as a differential difference amplifier for frequencies up to about 10 MHz with a differential input range limited to 200 mV

Keywords

CMOS integrated circuits; differential amplifiers; linear integrated circuits; linear network analysis; linear network synthesis; operational amplifiers; 10 MHz; 14 MHz; 2 micron; 5 V; 6 mW; 68 dB; CMOS amplifier architecture; MOSIS; SPICE; differential difference amplifier; high-speed op-amp; reconfigurable type; CMOS process; Circuit simulation; Circuit testing; Differential amplifiers; Frequency; Gain; Operational amplifiers; Rail to rail inputs; Rail to rail outputs; SPICE;

fLanguage

English

Journal_Title

Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on

Publisher

ieee

ISSN

1057-7122

Type

jour

DOI

10.1109/81.153646

Filename

153646