DocumentCode :
1219766
Title :
Vacuum-insulated-gate field-effect transistor
Author :
Huang, Jie ; Howe, R.T. ; Lee, Hae-Seung
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., MIT, Cambridge, MA, USA
Volume :
25
Issue :
23
fYear :
1989
Firstpage :
1571
Lastpage :
1573
Abstract :
A vacuum-insulated-gate field-effect transistor (VIGFET) is fabricated using a modified polysilicon-gate MOS process. The vacuum insulation is formed by first selectively etching the initial SiO2 layer under the polysilicon gate in HF and then depositing LPCVD SiO2 (LTO) to seal the evacuated cavity under the gate. Initial measurements of n-channel FET drain characteristics result in an effective value for the channel-electron mobility*gate capacitance product of k´= mu nC´=21 mu A V-2, comparable to that of conventional MOSFETs.
Keywords :
carrier mobility; chemical vapour deposition; etching; insulated gate field effect transistors; LPCVD; Si-SiO 2; VIGFET; channel-electron mobility; gate capacitance; modified polysilicon-gate MOS process; n-channel FET drain characteristics; selectively etching; vacuum insulation; vacuum-insulated-gate field-effect transistor;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19891055
Filename :
138799
Link To Document :
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