DocumentCode
1220009
Title
Evaluation and optimization of package processing and design through solder joint profile prediction
Author
Yeung, Betty H. ; Lee, Tien-Yu Tom
Author_Institution
Motorola Inc., Tempe, AZ, USA
Volume
26
Issue
1
fYear
2003
Firstpage
68
Lastpage
74
Abstract
Solder joints are generated using a variety of methods to provide both mechanical and electrical connection for applications such as flip-chip, wafer level packaging, fine pitch, ball-grid array, and chip scale packages. Solder joint shape prediction has been incorporated as a key tool to aid in process development, wafer level and package level design and development, assembly, and reliability enhancement. This work demonstrates the application of an analytical model and the Surface Evolver software in analyzing a variety of solder processing methods and package types. Bump and joint shape prediction was conducted for the design of wafer level bumping, flip-chip assembly, and wafer level packaging. The results from the prediction methodologies are validated with experimentally measured geometries at each level of design.
Keywords
computer aided analysis; electronic engineering computing; flip-chip devices; integrated circuit interconnections; integrated circuit packaging; microassembling; modelling; optimisation; soldering; Surface Evolver software; analytical model; bump shape prediction; flip-chip assembly; package processing optimization; solder joint profile prediction; solder joint shape; solder processing methods; wafer level bumping; wafer level packaging; Analytical models; Application software; Assembly; Chip scale packaging; Design optimization; Process design; Shape; Software packages; Soldering; Wafer scale integration;
fLanguage
English
Journal_Title
Electronics Packaging Manufacturing, IEEE Transactions on
Publisher
ieee
ISSN
1521-334X
Type
jour
DOI
10.1109/TEPM.2003.812998
Filename
1205224
Link To Document