Title :
Excess drain current in heterojunction FETs due to substrate space-charge-limited current
Author :
Tehrani, Saied ; Goronkin, Herb ; Hoogstra, Marjorie M. ; Maracas, George N. ; Curless, Jay A. ; Kramer, Gary D. ; Peffley, Marilyn S. ; Tsui, Raymond K.
Author_Institution :
Motorola Inc., Tempe, AZ, USA
fDate :
9/1/1989 12:00:00 AM
Abstract :
A comparison of gated and ungated heterostructure FETs shows that high output conductance, poor pinchoff, and kinks in the I-V characteristics of heterojunction FETs (HFETs) are related to space-charge-limited conduction (SCLC) associated with deep traps in the substrate. The dominant trap level was determined from I-V measurements of an ungated structure as a function of temperature and the trap density was determined from SCLC characteristics. Reduction in excess drain current can be achieved by using a high trap concentration substrate and by increasing the electron barrier between the channel and the substrate
Keywords :
field effect transistors; semiconductor device models; HFETs; I-V characteristics kinks; I-V measurements; SCLC; deep traps; dominant trap level; electron barrier; excess drain current; gated HFETs; heterojunction FETs; heterostructure FETs; high output conductance; high trap concentration substrate; models; poor pinchoff; space-charge-limited conduction; substrate space-charge-limited current; trap density; ungated HFETs; Buffer layers; Electron traps; FETs; Gallium arsenide; HEMTs; Heterojunctions; MESFETs; MODFETs; Temperature; Voltage;
Journal_Title :
Electron Devices, IEEE Transactions on
