Title :
Digital ready TV platform with synchronization shaping circuit
Author :
Cheon, Sung-Ryoul ; Kim, Ik-Hwan ; Lee, Ho-Keun ; Ha, Yeong-Ho
Abstract :
This paper proposes an improved digital ready TV platform that can support a signal input with various resolutions. Due to the inadequate performance of the built-in digital PLL (phase-locked loop) of an ADC (analog to digital converter) and poor tolerance of ADC ICs, there are problems in the stable processing of synchronization signals with various input signals. Accordingly, the proposed synchronization shaping technique regenerates the horizontal synchronization signal in the vertical blanking interval based on the regularity of the synchronization signal, i.e. the timing of the signal falling edge remains constant, thereby solving the above problem and minimizing the interference of the system. As a result, the proposed system can stabilize various synchronization signals with different resolution modes.
Keywords :
analogue-digital conversion; digital phase locked loops; digital television; interference suppression; minimisation; signal processing; synchronisation; television receivers; ADC IC; analog to digital converter; digital PLL; digital phase-locked loop; digital ready TV platform; interference minimizing; synchronization shaping circuit; synchronization signal processing; vertical blanking interval; Central Processing Unit; Circuits; Communication standards; Digital TV; FCC; North America; Signal processing; Signal resolution; Switches; TV broadcasting;
Journal_Title :
Consumer Electronics, IEEE Transactions on
DOI :
10.1109/TCE.2003.1205480