• DocumentCode
    1220477
  • Title

    VLSI architectures for convolver design using number theoretic transforms

  • Author

    Arambepola, B.

  • Author_Institution
    Dept. of Electr. Eng., Imperial Coll. of Sci., Technol. & Med., London, UK
  • Volume
    25
  • Issue
    23
  • fYear
    1989
  • Firstpage
    1604
  • Lastpage
    1606
  • Abstract
    Efficient VLSI architectures are presented for implementing arithmetic operations modulo a Fermat number. An architecture for a digital convolution device based on these techniques is described.
  • Keywords
    VLSI; digital arithmetic; number theory; transforms; Fermat number modulo; Fermat number transform; VLSI architectures; convolver design; digital convolution device; implementing arithmetic operations; modulo Fermat number arithmetic; modulo addition; modulo multiplication; number theoretic transforms;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19891077
  • Filename
    138821
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1220477