n+-poly-to-n+-silicon capacitor structures for single-poly analog CMOS and BiCMOS processes

n⁺-poly-to-n⁺-silicon precision capacitor structures formed by utilizing an n⁺ phosphorus implant and an oxide layer grown simultaneously with gate oxide for single-poly analog CMOS processes are described. The use of oxide-nitride-oxide layers as the capacitor dielectric to enhance dielectric strength and increase capacitance per unit area is discussed. Use of the capacitor n ⁺ implant to form simultaneously the collector plug (or sinker) region of n-p-n bipolar devices to reduce collector resistance for an analog BiCMOS process is presented