DocumentCode :
1221265
Title :
Junction-isolated CMOS for high-temperature microelectronics
Author :
Brown, Richard B. ; Wu, Koucheng ; Ghezzo, Mario ; Brown, Dale M. ; Downey, Evan ; Hanchar, Dave
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA
Volume :
36
Issue :
9
fYear :
1989
fDate :
9/1/1989 12:00:00 AM
Firstpage :
1854
Lastpage :
1856
Abstract :
Latchup susceptibility over a temperature range of 25-315°C for variations on a 1.2-μm CMOS process is studied. A special high-performance process, including all refractory metallization, thinner epi, and higher doping levels, resulted in metal-migration immunity and doubling of the latchup holding voltage and current at 300°C
Keywords :
CMOS integrated circuits; circuit reliability; electrical faults; integrated circuit technology; 1.2 micron; 23 to 315 degC; high-performance process; high-temperature microelectronics; latchup holding current improvement; latchup holding voltage; latchup susceptibility; metal-migration immunity; refractory metallization; CMOS process; Circuits; Equations; Error analysis; Microelectronics; Random access memory; Read-write memory; Research and development; Virtual private networks; Virtual reality;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/16.34256
Filename :
34256
Link To Document :
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