DocumentCode
1223297
Title
The effect of dimensional scaling on the erase characteristics of NOR flash memory
Author
Lee, Wook H.
Author_Institution
Memory Div., Samsung Electron. Co. Ltd., Yong-In, South Korea
Volume
24
Issue
4
fYear
2003
fDate
4/1/2003 12:00:00 AM
Firstpage
245
Lastpage
247
Abstract
In this letter, new limitations on the NOR flash cell scaling have been presented. As cell scaling is continued, a parasitic capacitance between floating gate and bitline contact induces a large disturbance to the Fowler-Nordheim tunneling characteristics due to a coupling ratio variation, resulting in a much broader erase threshold distribution. Theoretical analysis including MEDICI simulations confirms the effects of parasitic capacitance on the erase threshold of NOR flash cells.
Keywords
NOR circuits; cellular arrays; circuit simulation; flash memories; tunnelling; Fowler-Nordheim tunneling characteristics; MEDICI simulations; NOR flash memory; bitline contact; cell scaling; coupling ratio variation; dimensional scaling; erase characteristics; erase threshold distribution; floating gate; parasitic capacitance; Analytical models; Associate members; Flash memory; Interference; Medical simulation; Nonvolatile memory; Parasitic capacitance; Testing; Threshold voltage; Tunneling;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/LED.2003.810882
Filename
1206852
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