DocumentCode :
1223344
Title :
A new combination-erase technique for erasing nitride based (SONOS) nonvolatile memories
Author :
Chindalore, Gowrishankar L. ; Swift, Craig T. ; Burnett, David
Author_Institution :
Embedded Memory Center, Motorola Inc., Austin, TX, USA
Volume :
24
Issue :
4
fYear :
2003
fDate :
4/1/2003 12:00:00 AM
Firstpage :
257
Lastpage :
259
Abstract :
A new technique of erasing nonvolatile memory (NVM) devices based on nitride storage (SONOS) with bottom oxide thickness in the range of 30 /spl Aring/ has been developed. Oxide thickness in this range is necessary to minimize the undesirable effects of gate disturb while still enabling a low-voltage operation to maximize the cost benefit of SONOS memories. To erase such bitcells, Fowler-Nordheim tunneling (FNT) is preferred over hot-hole injection (HHI) due to the less damaging nature of FNT. However, FNT alone cannot be used to erase the device completely due to erase saturation limitations. Hence, the new "combination-erase" technique combines both FNT and HHI erase to achieve a fast and controlled erase. Furthermore, by using FNT erase at higher field conditions, and HHI erase at lower field conditions, the reliability of the bitcell is also improved.
Keywords :
hot carriers; integrated circuit reliability; integrated memory circuits; low-power electronics; semiconductor-insulator-semiconductor devices; tunnelling; 30 /spl Aring/; Fowler-Nordheim tunneling; SONOS; Si; bottom oxide thickness; combination-erase technique; erase saturation limitations; hot-hole injection; low-voltage operation; nitride based nonvolatile memories; reliability; Channel hot electron injection; EPROM; Hot carriers; Nonvolatile memory; PROM; SONOS devices; Secondary generated hot electron injection; Semiconductor device manufacture; Tunneling; Voltage;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2003.810883
Filename :
1206856
Link To Document :
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