DocumentCode :
1223452
Title :
A fast track trigger processor for the OPAL experiment at LEP, CERN
Author :
Bramhall, M. ; Jaroslawski, S. ; Penton, A. ; Hammarström, R. ; Joos, D. ; Weber, C.
Author_Institution :
Rutherford Appleton Lab., Chilton, Didcot, UK
Volume :
36
Issue :
1
fYear :
1989
fDate :
2/1/1989 12:00:00 AM
Firstpage :
380
Lastpage :
383
Abstract :
The authors present the operational features and an engineering overview of criteria used in designing and building the fast track trigger processor for the OPAL experiment. The function of the processor is to examine, between successive LEP beam crossings (22 μm), the multihit data generated by two central drift chambers and to provide the OPAL first-level trigger with information about the topology and the multiplicity of good tracks. The classes of events looked for are in the form of straight tracks in the R-Z plane which originate in the interaction region. The tracks are found in the R -Z and the R-φ planes by 24 fast track-finder circuits operating in parallel using a novel histogramming technique. A semicustom coincidence array circuit is used to match tracks
Keywords :
coincidence circuits; multiprocessing systems; particle track visualisation; physics computing; signal processing equipment; special purpose computers; trigger circuits; LEP; OPAL experiment; R-φ planes; R-Z plane; beam crossings; coincidence array circuit; fast track trigger processor; first-level trigger; histogramming technique; particle track multiplicity; particle track topology; straight tracks; track-finder circuits; Buildings; Circuits; Data analysis; Design engineering; Detectors; Electrons; Hardware; Laboratories; Testing; Wires;
fLanguage :
English
Journal_Title :
Nuclear Science, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9499
Type :
jour
DOI :
10.1109/23.34468
Filename :
34468
Link To Document :
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