DocumentCode
1223518
Title
A novel high-speed sense amplifier for Bi-NOR flash memories
Author
Chung, Chiu-Chiao ; Lin, Hongchin ; Lin, Yen-Tai
Author_Institution
Dept. of Electr. Eng., Nat. Chung-Hsing Univ., Taichung, Taiwan
Volume
40
Issue
2
fYear
2005
Firstpage
515
Lastpage
522
Abstract
A novel high-speed current-mode sense amplifier is proposed for Bi-NOR flash memory designs. Program and erasure of the Bi-NOR technologies employ bi-directional channel FN tunneling with localized shallow P-well structures to realize the high-reliability, high-speed, and low-power operation. The proposed sensing circuit with advanced cross-coupled structure by connecting the gates of clamping transistors to the cross-coupled nodes provides excellent immunity against mismatch compared with the other sense amplifiers. Furthermore, the sensing times for various current differences and bitline capacitances and resistances are all superior to the others. The agreement between simulation and measurement indicates the sensing speed reaches 2ns for the threshold voltage difference of lower than 1 V at 1.8-V supply voltage even with the high threshold voltage of the peripheral CMOS transistors up to 0.8 V.
Keywords
CMOS integrated circuits; MOSFET; NOR circuits; amplifiers; circuit reliability; current-mode circuits; flash memories; tunnelling; 0.8 V; 1.8 V; 2 ns; Bi-NOR flash memories; CMOS transistors; FN tunneling; advanced cross-couple; bi-directional channel; bitline capacitances; bitline resistances; clamping transistors; cross-coupled nodes; current-mode sense amplifier; high-speed sense amplifier; sensing circuit; shallow P-well structures; threshold voltage; Bidirectional control; Capacitance; Circuit simulation; Clamps; Electrical resistance measurement; Flash memory; Joining processes; Threshold voltage; Transistors; Tunneling;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.2004.840965
Filename
1388641
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