• DocumentCode
    1224139
  • Title

    A microprocessor farm architecture for high speed data acquisition and analysis

  • Author

    Cutts, D. ; Hoftun, J.S. ; Johnson, C.R. ; Zeller, R.T.

  • Author_Institution
    Dept. of Phys., Brown Univ., Providence, RI, USA
  • Volume
    36
  • Issue
    1
  • fYear
    1989
  • fDate
    2/1/1989 12:00:00 AM
  • Firstpage
    738
  • Lastpage
    739
  • Abstract
    The authors discuss the requirements and architecture of the DO Level-2 data acquisition system as well as its current status. They then consider its implementation using a new generation of hardware which is currently under development. The major enhancement to the acquisition system will be the adaptation and use of new Q22MPM multiport memories. Block diagrams of the acquisition system and of the multiported memory are presented
  • Keywords
    computer architecture; data acquisition; physics computing; DO Level-2 data acquisition system; Q22MPM multiport memories; architecture; Bandwidth; Cables; Data acquisition; Data analysis; Filtering; Hardware; Microprocessors; Physics; SCADA systems; System testing;
  • fLanguage
    English
  • Journal_Title
    Nuclear Science, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9499
  • Type

    jour

  • DOI
    10.1109/23.34539
  • Filename
    34539
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1224139