DocumentCode :
1224561
Title :
Modeling double-layer capacitor behavior using ladder circuits
Author :
Nelms, R.M. ; Cahela, D.R. ; Tatarchuk, Bruce J.
Author_Institution :
Dept. of Electr. & Comput. Eng., Auburn Univ., AL, USA
Volume :
39
Issue :
2
fYear :
2003
fDate :
4/1/2003 12:00:00 AM
Firstpage :
430
Lastpage :
438
Abstract :
The double-layer capacitor (DLC) is a very complex device that is best represented by a distributed parameter system. Many different lumped-parameter equivalent circuits have been proposed for the DLC. An examination into utilizing a ladder circuit to model a DLC is presented. Parameters for different ladder circuits are determined from AC impedance data. Variations in circuit parameters with DC bias and manufacturing have been investigated. The performance of the ladder circuit has been evaluated in slow discharge and pulse load applications.
Keywords :
distributed parameter networks; electric impedance measurement; electrolytic capacitors; electronic engineering computing; equivalent circuits; ladder networks; AC impedance measurement; DLC representation; distributed parameter systems; double-layer capacitor behavior modeling; electrochemical capacitors; ladder circuits; lumped-parameter equivalent circuits; parameter DC bias/manufacturing variations; pulse load operation; slow discharge mode operation; Battery charge measurement; Capacitors; Circuit testing; Distributed parameter systems; Equivalent circuits; Impedance measurement; Manufacturing; Paramagnetic resonance; Pulse circuits; Voltage;
fLanguage :
English
Journal_Title :
Aerospace and Electronic Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9251
Type :
jour
DOI :
10.1109/TAES.2003.1207255
Filename :
1207255
Link To Document :
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