Reduction of Threshold Voltage by Diffusion Control Technique in p-MISFETs Using Poly-Si/TiN/HfSiON Gate Stacks

The effects of the diffusion control technique by inserting physical vapor deposition (PVD)-TiN film between poly-Si and CVD-TiN films on the properties of p-MISFETs using poly-Si/TiN/HfSiON gate stacks have been studied. This insertion was effective in suppressing the diffusion of Si from poly-Si to HfSiON and was able to reduce the V_th value by 0.12 V while keeping the equivalent oxide thickness and S value constant, when the thicknesses of the PVD and CVD-TiN films were 10 and 5 nm, respectively. Although too much ion implantation of fluorine into the substrate deteriorates S value and I_ON, it was verified that this diffusion control technique, in conjunction with a moderate substrate fluorine implantation, provided a reduction of V_th in pMIS without a deterioration of I_ON.