Coincidence detection and selection in positron emission tomography using VLSI

A VLSI (very large scale integration) architecture for coincidence detection and selection used in the reconstruction of positron emission tomography images is described. Implementing this architecture in VLSI not only reduced the size and cost of the existing circuitry but also reduced the length requirements of an expensive high-speed cable. The architecture requires a large number of internal connections and is practical only in VLSI. The silicon area needed for making these connections was minimized by using nearest-neighbor communication within an array of modules. The design complexity of the architecture was kept manageable by replicating a single module 56 times within the array