DocumentCode :
1225972
Title :
High-Performance Routing at the Nanometer Scale
Author :
Roy, Jarrod A. ; Markov, Igor L.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI
Volume :
27
Issue :
6
fYear :
2008
fDate :
6/1/2008 12:00:00 AM
Firstpage :
1066
Lastpage :
1077
Abstract :
In this paper, we describe significant improvements to core routing technologies and outperform the best results from the International Symposium on Physical Design 2007 Global Routing Contest and the International Conference on Computer-Aided Design 2007 in terms of route completion and total wirelength.
Keywords :
CAD; VLSI; integrated circuit design; network routing; computer-aided design; core routing; high-performance routing; nanometer scale routing; Algorithm design and analysis; Design automation; International collaboration; Law; Legal factors; Physics computing; Research and development; Routing; Timing; Very large scale integration; Algorithms; design automation; routing; very large scale integration (VLSI);
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.2008.923255
Filename :
4526750
Link To Document :
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