DocumentCode :
122682
Title :
On FPGA implementation of blind adaptive antenna
Author :
Boonpoonga, Akkarat ; Sirisuk, Phaophak ; Krairiksh, Monai
Author_Institution :
Dept. of Electr. & Comput. Eng., King Mongkut´s Univ. of Technol. North Bangkok, Bangkok, Thailand
fYear :
2014
fDate :
19-21 March 2014
Firstpage :
1
Lastpage :
4
Abstract :
This paper presents a review of an adaptive array antenna using a constant modulus algorithm (CMA) in implementation aspect. MAC and parallel architectures of the CMA processing unit for the adaptive antenna are discussed. The CMA processing units based on MAC or parallel architecture is implemented on field programmable gate array (FPGA). The effect of floating-point and fixed-point arithmetic on the performance of the CMA processing unit is also discussed. Finally, the FPGA resource utilization and maximum operating clock frequency are shown.
Keywords :
adaptive antenna arrays; field programmable gate arrays; fixed point arithmetic; floating point arithmetic; CMA processing unit; FPGA implementation; FPGA resource utilization; MAC architectures; adaptive array antenna; blind adaptive antenna; constant modulus algorithm; field programmable gate array; fixed-point arithmetic; floating-point arithmetic; maximum operating clock frequency; parallel architectures; Adaptive arrays; Array signal processing; Arrays; Indexes; Prediction algorithms; Constant modulus algorithm (CMA); FPGA; implementation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Engineering Congress (iEECON), 2014 International
Conference_Location :
Chonburi
Type :
conf
DOI :
10.1109/iEECON.2014.6925958
Filename :
6925958
Link To Document :
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