Title :
Self-Repairing SRAM Using On-Chip Detection and Compensation
Author :
Mojumder, Niladri Narayan ; Mukhopadhyay, Saibal ; Kim, Jae-Joon ; Chuang, Ching-Te ; Roy, Kaushik
Author_Institution :
Dept. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
Abstract :
In nanometer scale static-RAM (SRAM) arrays, systematic inter-die and random within-die variations in process parameters can cause significant parametric failures, severely degrading parametric yield. In this paper, we investigate the interaction between the inter-die and intra-die V t variations on SRAM read and write failures. To improve the robustness of the SRAM cell, we propose a closed-loop compensation scheme using on-chip monitors that directly sense the global read stability and writability of the cell. Simulations based on 45-nm partially depleted silicon-on-insulator technology demonstrate the viability and the effectiveness of the scheme in SRAM yield enhancement.
Keywords :
SRAM chips; integrated circuit design; integrated circuit reliability; integrated circuit yield; logic arrays; nanotechnology; silicon-on-insulator; SRAM arrays; SRAM cell robustness; SRAM yield enhancement; closed loop compensation; on-chip compensation; on-chip detection; partially depleted silicon-on-insulator technology; process variation; self repairing SRAM; size 45 nm; Design; failure; static RAM (SRAM); variation; yield;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
DOI :
10.1109/TVLSI.2008.2008808
