• DocumentCode
    1227721
  • Title

    Is 25 Gb/s On-Board Signaling Viable?

  • Author

    Kam, Dong G. ; Ritter, Mark B. ; Beukema, Troy J. ; Bulzacchelli, John F. ; Pepeljugoski, Petar K. ; Kwark, Young H. ; Shan, Lei ; Gu, Xiaoxiong ; Baks, Christian W. ; John, Richard A. ; Hougham, Gareth ; Schuster, Christian ; Rimolo-Donadio, Renato ; Wu,

  • Author_Institution
    IBM T. J. Watson Res. Center, Yorktown Heights, NY
  • Volume
    32
  • Issue
    2
  • fYear
    2009
  • fDate
    5/1/2009 12:00:00 AM
  • Firstpage
    328
  • Lastpage
    344
  • Abstract
    What package improvements are required for dense, high-aggregate bandwidth buses running at data rates beyond 10 Gb/s per channel, and when might optical interconnects on the board be required? We present a study of distance and speed limits for electrical on-board module-to-module links with an eye to answering these questions. Hardware-validated models of advanced organic modules and printed circuit boards were used to explore these limits. Simulations of link performance performed with an internal link modeling tool allowed us to explore the effect of equalization and modulation formats at different data rates on link bit error rate and eye opening. Our link models have been validated with active, high-speed differential bus measurements utilizing a 16-channel link chip with programmable equalization and a per-channel data rate of up to 11 Gb/s. Electrical signaling limits were then determined by extrapolating these hardware-correlated models to higher speeds, and these limits were compared to the results of recent work on on-board optical interconnects.
  • Keywords
    electronics packaging; equalisers; optical interconnections; printed circuits; bit rate 11 Gbit/s; bit rate 25 Gbit/s; electrical on-board module-to-module links; electrical signaling limits; hardware-validated models; high-speed differential bus measurements; internal link modeling tool; link chip; on-board signaling; optical interconnects; package improvements; printed circuit boards; programmable equalization; Channel equalization; electrical signaling limit; high-speed bus measurement; high-speed serial link; link modeling; multilevel signaling;
  • fLanguage
    English
  • Journal_Title
    Advanced Packaging, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1521-3323
  • Type

    jour

  • DOI
    10.1109/TADVP.2008.2011138
  • Filename
    4811941