DocumentCode :
1227781
Title :
A High-Speed Sequential Decoder: Prototype Design and Test
Author :
Forney, G. David, Jr. ; Bower, Edward K.
Author_Institution :
Codex Corp., Mansfield, MA, USA
Volume :
19
Issue :
5
fYear :
1971
fDate :
10/1/1971 12:00:00 AM
Firstpage :
821
Lastpage :
835
Abstract :
We describe the design of a rate-1/2 hard-decision sequential decoder capable of operation at data rates up to 5 M bit/s. Test results are given for digitally generated errors, white noise, and real channels. The results are substantially in agreement with predictions of a coding gain of the order of 5 dB at a 10-5error rate.
Keywords :
Clocks; Communications technology; Costs; Decoding; Hardware; Laboratories; Prototypes; Sequential analysis; Testing; White noise;
fLanguage :
English
Journal_Title :
Communication Technology, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9332
Type :
jour
DOI :
10.1109/TCOM.1971.1090721
Filename :
1090721
Link To Document :
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