• DocumentCode
    1228291
  • Title

    Fault equivalence identification in combinational circuits using implication and evaluation techniques

  • Author

    Amyeen, M. Enamul ; Fuchs, W. Kent ; Pomeranz, Irith ; Boppana, Vamsi

  • Author_Institution
    Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
  • Volume
    22
  • Issue
    7
  • fYear
    2003
  • fDate
    7/1/2003 12:00:00 AM
  • Firstpage
    922
  • Lastpage
    936
  • Abstract
    Efficient identification of fault equivalence relations is essential for effective diagnostic test pattern generation. In this paper, we present efficient techniques for identifying functionally equivalent faults in combinational circuits. The techniques are based on implication of faulty values, and evaluation of faulty functions in cones of dominator gates of fault pairs. This is enhanced by utilizing circuit redundancy information. Both static and dynamic methods are developed to exploit relations among inputs of dominator cones and further speed up the identification of equivalent fault pairs. Experimental results for all ISCAS´85 circuits, full scan versions of ISCAS´89 circuits, and ITC´99 circuits show that most of the equivalent fault pairs are identified. Significant reductions are obtained in the runtime needed to prove equivalence and the runtime for diagnostic test pattern generation compared to previously proposed approaches.
  • Keywords
    automatic test pattern generation; circuit analysis computing; combinational circuits; fault diagnosis; identification; integrated logic circuits; redundancy; ATPG; circuit redundancy information; combinational circuits; diagnostic test pattern generation; dominator cones; dominator gates; dynamic methods; equivalent fault pairs; fault equivalence relations identification; functionally equivalent faults; redundant faults; static methods; Automatic test pattern generation; Circuit faults; Circuit testing; Combinational circuits; Failure analysis; Fault diagnosis; Manufacturing; Redundancy; Runtime; Test pattern generators;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2003.814241
  • Filename
    1208451