• DocumentCode
    1228294
  • Title

    Analysis of the Voltage Swing for Logic and Memory Applications in Si/SiGe Resonant Interband Tunnel Diodes Grown by Molecular Beam Epitaxy

  • Author

    Chung, Sung-Yong ; Jin, Niu ; Pavlovicz, Ryan E. ; Yu, Ronghua ; Berger, Paul R. ; Thompson, Phillip E.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Ohio State Univ., Columbus, OH
  • Volume
    6
  • Issue
    2
  • fYear
    2007
  • fDate
    3/1/2007 12:00:00 AM
  • Firstpage
    158
  • Lastpage
    163
  • Abstract
    A method is investigated to directly engineer the voltage swing in SiGe resonant interband tunnel diodes (RITDs). Voltage swing, defined here as the voltage difference between the peak voltage and the projected peak voltage, is independent of series resistance, and thus directly impacts the noise margin in hybrid tunnel diode memory and logic applications. The three components of the total RITD current are analyzed to describe the voltage swing. The dependence of voltage swing on delta-doping concentrations and post-growth annealing temperatures in SiGe RITDs grown by low-temperature molecular beam epitaxy (LT-MBE) is investigated and the experimental results are compared with a theoretical analysis. Techniques to increase the voltage swing are discussed
  • Keywords
    Ge-Si alloys; annealing; elemental semiconductors; resonant tunnelling diodes; semiconductor device noise; semiconductor doping; semiconductor epitaxial layers; semiconductor growth; silicon; LT-MBE; RITD; Si-SiGe; delta-doping concentrations; hybrid tunnel diode logic applications; hybrid tunnel diode memory applications; low-temperature molecular beam epitaxy; post-growth annealing temperatures; resonant interband tunnel diodes; semiconductor device doping; semiconductor epitaxial layers; voltage swing analysis; Annealing; Diodes; Germanium silicon alloys; Independent component analysis; Logic; Molecular beam epitaxial growth; Resonance; Silicon germanium; Temperature dependence; Voltage; Annealing; circuit noise; logic circuit fault tolerance; semiconductor device doping; semiconductor epitaxial layers; semiconductor junctions; tunnel diode; tunnel diode circuits;
  • fLanguage
    English
  • Journal_Title
    Nanotechnology, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1536-125X
  • Type

    jour

  • DOI
    10.1109/TNANO.2007.891831
  • Filename
    4126501